At Architecture Day 2020, Intel technology leaders showcased new architectures and innovations for the smart age
At Intel, we believe in the power of technology to enrich everyone's life and drive global progress. This is Intel since its inception unswerving guidance strategy. It began in the PC era, when technology enabled the massive digitisation of knowledge and networks, bringing a billion people into the world of the Internet. The advent of mobile and cloud computing has radically changed the way we live our lives. Today, more than 10 billion devices are connected to supercomputers in the cloud.
We believe that the whole world is about to enter the age of intelligence. By then, we will have 100 billion smart connected devices. The exascale of performance and architecture will enable intelligence to pervade everyone, enriching our lives in ways beyond imagination. This vision inspires and pushes me and Intel architects every day.
Currently, the speed of data generation exceeds our ability to analyze, understand, transmit, protect, and reconstruct data in real time. Analysing this vast amount of data requires even more computing power. More importantly, in order for this data to give us insight, computing power must be captured in real time, which means lower latency and closer access to users. At Intel, we are working hard to solve this problem with exponential pace of innovation.
Since the end of the Dennard Scaling era, the exponential commercial value derived from transistor technology has encouraged us to explore new ways to address these challenges across the stack. To that end, we're taking an entirely new approach, which we're calling "Six pillars of innovation," and announcing at Intel Architecture Day in November 2018. We believe that to continue the exponential essence of Moore's law, progress must be made on all these pillars.
At Intel Architecture Day 2020 this week, we demonstrated how we can move this process forward with a series of exciting new breakthroughs. We have a number of important progress has been made, which includes providing covers scalar, vector, matrix and spatial diversity architecture combination, with advanced processing technology to carry on the design, in order to support highly disruptive memory hierarchy, USES the advanced packaging integrated to the system, with the help of the speed of light interconnection to realize large-scale deployment, through a single software abstract unification, as well as the development of safety features.
You can click the link (https://newsroom.intel.com/architectureday2020), understand the speech content of Intel architecture, 2020. But at the same time, I want to highlight some of the highlights.
We Shared more details about "Disaggregated design methodology" and a roadmap for advanced encapsulation. By iterating through products on GPU, FPGA, and Lakefield clients, we demonstrated the power of EMIB and Foveros technologies to reduce the pitch of salient points.
At the same time, we Shared one of the most exciting developments in the transistor roadmap. We have introduced a new 10-nanometer SuperFin technology that USES new SuperMIM capacitors to redefine FinFET, delivering Intel's most powerful single-node intra - node performance enhancements comparable to the full-node conversion and Enabling leadership product roadmap.
When we combined the next-generation Willow Cove CPU architecture with our 10nm SuperFin technology, the Tiger Lake platform was born beyond imagination. We reveal the details of the upcoming Tiger Lake System-on-A-Chip (SoC) architecture, which makes a series of leaps forward, including strong CPU performance, leading graphics performance, advanced AI capabilities, more memory bandwidth, additional security features, better displays, better video, and more. I know you're eager to learn all the details about Tiger Lake, and we'll be sharing more over the next few weeks.
In addition to Tiger Lake, we have also taken an in-depth look at the next generation of Intel ® Agilex™ FPgas that offer groundbreaking performance ratios per watt. In fact, we demonstrated two generations of EMIB based disassembled products and Shared the first results of the 224 Gbps transceiver.
We also focused on how the Intel Xe GPU architecture laid the groundwork to help us build Gpus that extend from teraflops to petaflops. As our most efficient microprocessor architecture for PC and mobile computing platforms, XE-LP gives Tiger Lake leading graphics capabilities. Xe-lp also supports our first stand-alone GPU in 20 years, developed under the codenamed "DG1". At present, DG1 has been mass-produced. In addition, we have introduced the first Intel® Server GPU based on XE-LP, which aims to provide first-class flow density and visual effects for media transcoding and streaming media. The product will be shipped later this year.
For data center, we announced the first Xe - HP chip has been to provide customers samples. The XE-HP is the industry's first multiblock, highly scalable and high-performance architecture, based on Intel's EMIB technology, capable of delivering gigabit floating-point AI performance and rack-level media performance in a single package. The XE-HP will use an enhanced SuperFin technology.
At the same time, we've heard about the demand for Xe products from many game enthusiasts. The fourth microarchitecture in Intel's Xe product family, the XE-HPG, is optimized for gaming and will offer new graphics capabilities, including ray tracing. We plan to ship this microarchitecture in 2021, and I can't wait to get my hands on this GPU!
In the software space, we have previously stated our vision to provide developers with a unified, standards-based programming model across all XPU architectures. We are working towards this goal and will release a version of oneAPI Gold later this year. We also announced early access to DG1 for developers on Intel® DevCloud, ensuring that they can begin development using oneAPI without any configuration, download, or hardware installation process.
Since the last Intel Architecture Day, we've also made great strides in memory. Recently, as part of the third generation Intel ® XEON ® Extensible Processor (codename: Cooper Lake), we announced the second generation of Intel ® Auotan ™ persistent Memory product (Codename: Barlow Pass). Today, we are also committed to mass production of Intel's 4-bit design QLC by the end of 2020.
We are also deeply focused on how to improve security in response to changing threats. This includes the introduction of new technologies such as Intel® Control Flow Enforcement Technology that provide CPU-level security against common malware attacks. At the same time, we demonstrated for the first time a long-term vision in areas such as underlying security, workload protection, and software reliability.
We have also made important progress in advancing interconnection technologies. Intel announced in March 2019 that it was partnering with the industry to provide extensive support for Compute Express Link to accelerate the next generation of data center performance for future Sapphire Rapids processors. In addition, we have established a significant lead in driving customer engagement in silicon photonics technology. As data center transformation continues, Intel is providing SmartNIC (intelligent network card) products for network processing load with leading speed and basic accumulation to meet the needs of these customers.
Our Intel academicians and architects are in high spirits for 2021, 2022 and beyond. We had a preview of our product vision of using all six technical pillars, decompositional design, in the client and data center areas. In addition, our Intel Institute director introduced a number of emerging research areas that promise 100-to-1,000-fold improvements in computing power, including preliminary research on neural mimicry architecture in our world-leading laboratories.
Intel has been at the center of the technology industry for decades. By working with our customers, our products reshape the way we work, live and play. However, this journey of collaborative innovation is far from over. I believe that we are at the beginning of a new era, an era of intelligence, an era of "exascals of computing power for everyone." Unprecedented computing performance and innovation across all six technological pillars will make this era a reality.